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peary/interfaces/SerialMemory/serialmemory.hpp
peary/interfaces/SerialMemory/serialmemory.hpp
Peary Serial Memory Interface. More…
Namespaces
| Name |
|---|
| peary |
| peary::interface |
Classes
| Name | |
|---|---|
| class | peary::interface::SerialMemoryEndpoint Peary Serial Memory Interface. |
Detailed Description
Peary Serial Memory Interface.
Copyright: Copyright (c) 2016-2025 CERN and the Peary Caribou authors. This software is distributed under the terms of the LGPL-3.0-only License, copied verbatim in the file “LICENSE.md”. SPDX-License-Identifier: LGPL-3.0-only
Source code
#pragma once
#include <cstdint>
#include <cstdio>
#include <string>
#include <vector>
#include <fcntl.h>
#include <sys/mman.h>
#include "peary/interfaces/AXI4Lite/axi4lite.hpp"
#include "peary/utils/datatypes.hpp"
#include "peary/utils/exceptions.hpp"
namespace peary::interface {
class SerialMemoryEndpoint : public AXI4LiteEndpoint {
public:
explicit SerialMemoryEndpoint(std::string const& devpath,
const utils::memory_map& mem,
const size_t reg_addr_write,
const size_t reg_value_write,
const size_t reg_addr_read,
const size_t reg_value_read,
const size_t status);
~SerialMemoryEndpoint() = default;
SerialMemoryEndpoint() = delete;
pair_t write_impl(const pair_t&) override;
vector_t read_impl(const reg_t&, const unsigned int) override;
private:
// Transactions are triggered by writing into the address registers!
// Register for storing the target address and target values for write operations:
size_t _register_address_write;
size_t _register_value_write;
// Register for storing the target address and retrieved values for read operations:
size_t _register_address_read;
size_t _register_value_read;
// One status register that contains
// - transaction status [0] (high when transaction done),
// - error flag [1] (high when there was an error) and
// - optionally the device error code [31:2]
size_t _status;
};
} // namespace peary::interface
Updated on 2026-01-30 at 22:01:05 +0100